FeaturesCommunicates control channel messages between the processor circuit pack and the distributed network of port circuit packs on the TDM busControls 4 data channels that process and route information directly from the processor circuit pack to customer connected equipmentHas time of day clock with battery back for power failure or low voltage conditionsMonitors the status of the system clocks and alerts the processor circuit pack in the event of a failure of any clockAlso supports ISDNReplaced by TN794 Network Control/Packet interface for R7 and R8Replaced by TN2401 Network Control/Packet interface for R9 and R10IncludesRefurbishedLibraryAvaya Lucent Definity ECS Maintenance R6 Vol I and II.pdf
